Cadence's Palladium XP II platform speeds system verification
The Palladium XP II platform builds on the Palladium XP emulation technology, extending its capacity to 2.3 billion gates. With reduced power and increased gate density, customers can now run larger payloads in a smaller footprint, reducing overall cost of ownership. Cadence has also added support for eight new mobile and consumer protocols for simulation acceleration.
Expanded capabilities of its System Development Suite centre around Palladium, adding:
• hybrid technology, which combines the Cadence Virtual System Platform with the Palladium XP series to speed up embedded OS verification and increase performance for hardware/software verification;
• embedded test bench for advanced virtualisation of system environments, enabling users to verify peripheral software drivers prior to Soc tape-out, resulting in faster post-silicon bring-up.
The 60-times claim for OS bring-up comes from a user quote by Nvidia; “With the Cadence Palladium Virtual System Platform hybrid solution, we experienced up to 60x speed-up of OS bring-up over pure in-circuit emulation combined with up to 10x performance improvement for production and test software executing on top of the OS interacting with accurate hardware representations in the Palladium platform,” said Narendra Konda, director of engineering at NVIDIA.
“Using the Palladium platform and its embedded test bench use model, we uncovered critical issues and resolved them prior to tape out, using models of peripheral devices that are connected to the SoC as part of a fully synthesizable embedded test bench,” said Vahid Ordoubadian, director of IC Engineering, Mobile Platform Solutions at Broadcom Corp.
- Coventor expands scope of MEMS modeling software
- BAE Systems develops 'smart skin' for aircraft
- mCube forms indoor navigation subsidiary
- 10 finalists revealed for element14's “Hats Off” challenge
- A new breed of analog design tools
- Sensor fusion, radar to drive ADAS
- IR image sensor has 12-micron pixels
- When GND isn't GND single-ended circuits become differential
- Touch interface software suite tackles haptic effects
- Software offers five bench instruments in a box
- ADC pushes boundaries for software defined radio
- Pulsic offers automated IC layout tool
- Time for custom, analog design tools to automate?
- Reference design outputs four analogue variables
- 'No-shunt' battery-management reference design
- CEO interview: AMS' Laney on driving a sensor-driven business
- Dutch startup shrinks 60GHz radars, increases precision
- Austria's AMS is shopping for a wafer fab
- EE Times' annual salary & opinion survey report
- Interview: Sir Peter Bonfield on how Europe can compete
- Report: India, China show interest in Korean analog foundry
- Rohm opens MEMS foundry operation
- The inner workings of the three-op-amp INA
- Audi moves to 48V supply
- How to kill an ultracapacitor
- Could AMS' expansion be bad news for Europe?
- IMEC offers analog IC design course
- TI adds temperature, light, proximity sensors to address Industry 4.0
- Europe leads world in chip market growth
- Bosch acknowledges ASE's help with accelerometer
- Flexible and Low Power Driving of Solenoid Coils
- Automated Macro-Model Extraction Using SPICE Netlist
- Dual 13A μModule Regulator with Digital Interface for Remote Monitoring & Control of Power
- Localized Haptic Feedback for Touch Controls
- Precision Industrial Systems Demand a New Level of Data Conversion Accuracy
- 14-Bit, 4-20 mA, Loop Powered, Thermocouple Temperature Measurement System Using ARM Cortex-M3
- High-Precision Sine/Cosine Interpolation