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IMEC set to take transistors 'sub-threshold'

June 14, 2010 | Peter Clarke | 222900816
IMEC set to take transistors 'sub-threshold' Researchers at IMEC are looking at the use of silicon transistors in the sub-threshold region of their operation as a way of pursuing ultra-low power goals. A future SoC for biomedical applications could have blocks designed to operate at 0.2 or 0.3 V, researchers said.
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The threshold voltage (Vt) is nominally the point below which a transistor turns off and this has typically represented a limit to voltage scaling as a source of improved power efficiency. Vt is typically 0.7-V going down to 0.5-V in modern CMOS processes. However, in reality there is some sub-threshold conduction. Indeed, in normal transistor operation that sub-threshold conduction is viewed as leakage and wasted energy. If a transistor could be operated in this sub-threshold region significant power savings could be achieved.

But operating transistors at voltages below Vt is likely to be difficult and its use will not suitable for all circuits or application cases. A key factor is that it comes at the expense of frequency performance, which can be a problem for digital applications. It is easier to apply to low-frequency analog but transistor operation it is also strongly dependent on manufacturing variations in such things as oxide thickness, junction depth, and body doping, which could make analog performance hard to calibrate.

Nonetheless power-saving is becoming the primary driver of much of IMEC's research. For example, ultra-low power operation is important to the operation of body-area network (BAN) radios for use in medical appliances, one of the selected areas of research at IMEC's outpost at the Holst Center (Eindhoven, The Netherlands).

The goal is to power wireless electronic systems from harvested energy, which currently offers about 100-microwatts of power. Unfortunately, it is hard to get even the simplest of electronic systems, including a sensor, microcontroller and wireless transceiver, below about 10-milliwatts, according to Bert Gyselinckx, general manager of the Human++ research program at IMEC. So batteries are likely to remain a reality for some time to come.

Gyselinckx's group plans to produce a short range RF transceiver ten times more power efficient than today's Bluetooth and Zigbee chips (see Video: RF uses one tenth the power of Bluetooth, Zigbee). This progress has been made by developments in radio architecture and circuit design applied to conventional CMOS process technology at 90-nm minimum geometry.

Giselinckx said IMEC is beginning to look at sub-threshold operation: "We are doing some work to characterize silicon. The issues around transistor operation are completely different at 0.3-V. So we are starting with modeling the transistor behavior. It is not a full program."

At the same time IMEC is working on three generations of biomedical processor, the latest of which could make use of sub-threshold operation transistors. The 2009 instantiation was the BioDSP, optimized for ECG and EEG processing and displaying a tenfold improvement over the Texas Instruments MSP430 in terms of the power consumed while running algorithms.

This year's model is the BioFlux, which is based on the CoolFlux DSP fabric from NXPl, which provides greater programming flexibility. In this IC standby and leakage power have also been reduced, according to Harmke De Groot, program director for ultra low power wireless and DSP at IMEC.

For 2011 de Groot's team is working on an SOC fully optimized for ambulatory ECG measurements through advanced motion artifact removal. Local processing to remove noise and refine data can reduce the radio transmission burden by a factor of 100, de Groot said. And some parts of the SoC will be designed to operate at sub-threshold voltages, said de Groot. "We need library characteristics and we are doing initial experiments. We are making test ICs for such circuits to test models." De Groot said operation was likely to be around 0.2 to 0.3-V. "It is a case where we must determine the optimization."

De Groot is working in collaboration with the University of Technology Eindhoven on standard cells that are resilient to process variations, taking advantage of effects that are only present at sub-threshold regions such as the reverse short channel effect. This leads to a sub-threshold Vdd of between 0.2-0.3 V in 90 nm CMOS.

"Because of the very low active time (less than 0.2 percent) in ECG processing, leakage energy is dominant in our BioDSP and Bioflux designs - both in 90-nm CMOS," said de Groot. The ECG-SoC is being moved to 180-nm. "The ultralow power and high dynamic range needed for the analog components was the initial trigger to use 180-nm and the analog components are designed at standard Vdd." However, moving the digital part to 180-nm would increase active power consumption, which has motivated de Groot to reduce Vdd to sub-threshold voltages in this upcoming design.


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