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Ping! And the accuracy is gone

July 27, 2009 | eetimes | 218600730
Where does the ringing come from when you sample the input voltage of a high-speed ADC? Analog DesignLine Europe's resident 'filter wizard' explains.
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(This guest column is the third in a series of topical comments and insights from Kendall Castor-Perry, an experienced analog designer, filter wizard, audio expert, systems engineer, technology marketer and product manager. Click here to read Kendall's first column, entitled ' Who, what and why?' and here for his second, 'Alias, damned alias and statistics.')

Click here to see all articles by Analog Guru Kendall Castor-Perry

In a recent National article, we saw the settling at the input of a sampling ADC being tweaked with resistors and capacitors. It was good to see the subject raised but the treatment seemed rather empirical to me, and didn't explain where all the ringing comes from. You want to know, surely? So here is some simulation work I did many years back, which helps to explain it.

High speed ADCs sample the input voltage onto internal capacitors, so there's a charging current. Rapidly-changing input voltages must be acquired to high accuracy during the short fraction of the sampling cycle reserved for the charge transfer. There's usually no buffering between the inputs and the sampling switches. So the time-domain behaviour of the charge flow is determined by the time constants formed between this capacitor and the impedances in the charging current path, both external and internal to the chip.

This charging behaviour is outside the control of either the ADC designer or the guy that writes the datasheet. If the external impedances affect the settling behaviour of the charging waveform (and reader, they do) they may prevent the input voltage from being acquired to sufficient accuracy in the time available. Level-and slope-dependent errors follow, appearing as gain and linearity problems even on low frequency inputs.

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